Wiring Material

In the Simple Positive Regulator Circuit Diagram, Ql and Q2 are connected in the classic SCR or thyristor configuration. Where higher input voltages or minimum component count are required, the schema for thyristor boost can be used. 

  Positive Regulator Circuit Diagram

The thyristor is running in a linear mode with its cathode as the control terminal and its gate as the output terminal. This is known as the remote base configuration.

Build a Switching Regulator Circuit Diagram operating at 200Khz. This Switching Regulator Circuit Diagram provides a regulated dc with less than 100 mV of ripple for microprocessor applications. Necessary operating voltages are taken from the bleeder resistor network connected across the unregulated 28 V supply. 

The output of the LM710 comparator (actually an oscillator running at 200 kHz) is fed through a leveNshifting schema to the base of bipolar transistor Q2 This transistor is part of a bootstrap schema necessary to turn the power MOSFET full on in totem-pole MOSFET arrays.

This is the simple switching regulator schema diagram. The LTC10432 switched-capacitor building block provides nonoverlapping complementary drive to the Ql to Q4 power MOSFETs. The MOSFETs are arranged so that Cl and C2 are alternately placed in series and then parallel. During the series phase, the + 12 V battery`s current flows through both capacitors, charging them, and furnishing load current. 

During the parallel phase, both capacitors deliver current to the load. Ql and Q2 receive similar drive from pins 3 and 11. The diode-resistor networks provide additional nonoverlapping drive characteristics, preventing simultaneous drive to the series-parallel phase switches. Normally, the output would be one-half of the supply voltage, but C1 and its associated components close a feedback loop, forcing the output to 5 V. With the schema in the series phase, the output heads rapidly positive. 

When the output exceeds 5 V, Cl trips, forcing the LTC1043 oscillator pin, trace D, high; this truncates the LTC1043`s triangular-wave oscillator cycle. The schema is forced into the parallel phase and the output coasts down slowly, until the next LTC1043 clock cycle begins. Cl`s output diode prevents the triangle down-slope from being affected and the 100-pF capacitor provides sharp transitions. The loop regulates the output to 5 V by feedback controlling the turn-off point of the series phase.